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Signal to noise ratio

The present silicon target detector layout foresees 2 sets of 10 microstrip planes with a pitch of 10 and 20 tex2html_wrap_inline2278 m respectively. The silicon planes should be 150 tex2html_wrap_inline2278 m thick in order to limit the amount of scattering material. The readout will be performed by a fast chip like the FELIX or APV5-RH developed by the RD20 Collaboration.

No prototype of such system exists yet but preparatory work has started already.

In the meanwhile, based on the experience of WA92 [27] and on informations from the RD20 Collaboration [28], we can make a first estimate as follows.

Because of the reduced thickness of the silicon counters, only half of the usual 25000 electrons will be created in a detector by traversing MIPs. Due to charge diffusion during the drift time and capacitive sharing, we expect to collect about 5000-6000 electrons per strip.

Because of the fine pitch (and consequently of the high ratio between the strip width and the strip pitch), the interstrip capacitance is expected to be rather high (of the order of 3-4 pF/cm). We thus expect something like 10 pF as total load capacitance to the input of the preamplifiers. For fast readout chips as FELIX and APV5 this implies an equivalent noise charge (ENC) of about 700-800 electrons.

As a consequence a signal to noise ratio of about 6-8 can be expected.

At the same time, we have started the preparations for prototype assembly and test.

We have already ordered some silicon microstrip counters with 12 tex2html_wrap_inline2278 m pitch (this resulted to be the minimum safe size to realize). The detectors will have an active area of about 20x20 mm tex2html_wrap_inline2256 , polysilicon bias resistors and integrated AC coupling. The active area will be surrounded by a region with the fanout of the single strips to 50 tex2html_wrap_inline2278 m pitch lines with bonding pads, at both edges of the detector.

Samples with both 150 and 300 tex2html_wrap_inline2278 m thickness will be delivered.

On such samples we will be able to measure static electric parameters like the total resulting load capacitance per channel.

In a first stage we plan to read out these counters using a very low noise but slow electronics, for example the VA2 chip. These tests will allow us to measure the amount of charge collected and study the mechanism of charge sharing between neighbouring strips.

In a second stage we will use the faster electronics, realizing a device almost identical to the final detector if satisfactory results will be obtained.

We expect the detectors to be delivered by late summer 1996. The first tests could be completed by the end of 1996.

next up previous contents
Next: Readout frequency Up: SILICON DETECTORS Previous: SILICON DETECTORS

Lars Schmitt
Wed May 22 16:44:09 METDST 1996